The Call for Papers for the RISC-V Summit is open through Monday, July 15. To submit your speaking proposal for the RISC-V Summit and learn more about the formats and types of sessions, submission guidelines and deadlines, please visit: https://tmt.knect365.com/risc-v-summit/speaking. Speakers will be notified in early August.
The RISC-V Foundation, in partnership with Informa Tech, will hold its second annual RISC-V Summit at the San Jose McEnery Convention Center from Dec. 9-12, 2019. The Summit is a major international event promoting RISC-V, bringing together the community for a multi-track conference, tutorials, exhibitions and more. Last year’s event featured more than 1,100 attendees from 32 countries around the globe. The Exhibit Hall featured 29 exhibitors, with an impressive 53 presentations across the two days, as well as a hackathon. This year’s Summit is expected to have even more attendees, exhibitors and presentations.
Sponsorship packages are also available, specific to launching a new product or service, boosting brand exposure, meeting customers in-person, positioning a brand as a market and thought leader and generating new sales leads. To learn more about sponsorship packages and exhibition opportunities, please visit: https://tmt.knect365.com/risc-v-summit/sponsor-or-book.
RISC-V (pronounced “risk-five”) is a free and open ISA enabling a new era of processor innovation through open standard collaboration. Founded in 2015, the RISC-V Foundation comprises more than 250 members building the first open, collaborative community of software and hardware innovators powering a new era of processor innovation. Born in academia and research, RISC-V ISA delivers a new level of free, extensible software and hardware freedom on architecture, paving the way for the next 50 years of computing design and innovation.
The RISC-V Foundation, a non-profit corporation controlled by its members, directs the future development and drives the adoption of the RISC-V ISA. Members of the RISC-V Foundation have access to and participate in the development of the RISC-V ISA specifications and related HW / SW ecosystem.
Source: RISC-V Foundation