Event: FPGAworld Conference 2026
Date: 8 September 2026
Location: Stockholm, Sweden
Host: FPGAworld AB
Registration: Free for attendees, includes coffee, lunch and a go-home drink
About the Conference
FPGAworld is an international forum for researchers, engineers, teachers, students and hackers working with programmable logic. The programme covers complex analog, digital and software FPGA SoC systems, FPGA and ASIC-based products, and educational and industrial case studies. It has run continuously since 2012, with an archive of past programmes available from the organiser.
The event runs as a single day combining presentations, a product and exhibitor floor, and an open submission track. Alongside the industrial and academic sessions, a dedicated track is reserved for student, maker and hobby FPGA projects.
Keynote: Survival of the Efficient
Ilya Ganusov, Chief Silicon Architect at Altera, delivers a keynote on lessons from forty years of FPGA generations. The argument is that cost, in all its dimensions, has been the real architect of programmable logic — dictating the evolution of logic fabrics, routing complexity and the integration of hardened IP, while performance and power metrics tell only part of the story. The talk extends that framing forward into the next decade of reconfigurable computing, weighing area, power, development time and software friction as a single economic trade-off.
Ganusov joined Intel’s FPGA organisation in 2018 and led the Agilex core architecture and its optimisation for AI, HPC, wireless and real-time workloads. He previously held senior architecture roles at Xilinx and at Achronix, where he worked on asynchronous FPGA architectures, and holds a PhD from Cornell.
Keynote: Bitstreams, Backstories and Breakthroughs
Martin Kellermann of Microchip Technology GmbH traces the evolution of FPGA security from antifuse roots through authenticated configuration and side-channel-resistant provisioning to today’s layered feature sets. The talk includes the episode that shifted Microchip’s trajectory: an independent lab demonstrating device key extraction via differential power analysis, which pushed the company toward DPA-resistant cryptography and third-party evaluation.
Attendees get a practical timeline of authenticated bitstreams, DPA-hardened flows, PUF-anchored key custody, tamper sensors with deterministic zeroization, and secure provisioning chains — with guidance on when each control actually matters in a design.
Exhibitors and Presenters
The 2026 exhibitor and presenter list spans the major vendors and a strong regional Nordic contingent: Altera, AMD/Xilinx, Microchip, Lattice Semiconductor, Efinix, Siemens EDA, MathWorks, Arrow, Future Electronics, Trenz Electronic, Frontgrade Gaisler, Synective Labs, EmLogic, InnoFour, VHDLwhiz, Pantherun Technologies and ResQuant. Academic participation comes from Linköping University and Universität Heidelberg, with AGSTU FPGA Education and Branschorganisationen Svensk Elektronik also represented. AFRY and AGSTU are the 2026 sponsors.
Who Should Attend
The draw is the density rather than the scale. A one-day, free-to-attend event that puts Altera’s chief silicon architect, Microchip’s FPGA security position and a working exhibitor floor in the same room is an efficient way to survey the state of programmable logic in Europe. For engineers evaluating a vendor platform, for students with a project to show, and for anyone tracking how FPGA economics are shifting under AI and defence demand, the floor and the attendee list are worth as much as the stage.